Wednesday, 31 October 2018

makefile

test="write_test1"

clean:
rm -fr *work* *~* *.vstf transcript  *.wlf *.log *report*


compile:
vlib work
vlog -coveropt 3 +cover=sbceft +acc -sv -mfcu -timescale 1ns/1ns -f flist -l comp.log


gui:
vsim -coverage -do -gui work.tb -vopt +access +rw mc_tb +UVM_TESTNAME=$(test) +UVM_VERBOSITY=UVM_FULL  $ ./logfiles/$(test)_run.log


sim:
vsim -coverage -vopt -c +access +rw mc_tb +UVM_TESTNAME=$(test) +UVM_VERBOSITY=UVM_FULL -novopt -do run.do|tee $ ./logfiles/$(test)_run.log


coverage:
vsim  -coverage -vopt +access +rw mc_tb +UVM_TESTNAME=$(test)\
+UVM_VERBOSITY=UVM_FULL -novopt -c -do "coverage save -onexit -directive -codeAll mc_tb;log -r *;run -all; exit" |tee $ ./logfiles/$(test)_run.log



regress:test_1  test_2 test_3 test_4 test_5 test_6 test_7


test_1:
vsim -coverage -vopt -c +access +rw mc_tb +UVM_TESTNAME="read_in_reserve_test" +UVM_VERBOSITY=UVM_FULL -novopt -do run.do|tee $ ./logfiles/"read_in_reserve_test"_run.log

test_2:
vsim -coverage -vopt -c +access +rw mc_tb +UVM_TESTNAME="read_only_test" +UVM_VERBOSITY=UVM_FULL -novopt -do run.do|tee $ ./logfiles/ "read_only_test"_run.log
test_3:
vsim -coverage -vopt -c +access +rw mc_tb +UVM_TESTNAME= "read_test1" +UVM_VERBOSITY=UVM_FULL -novopt -do run.do|tee $ ./logfiles/ "read_test1"_run.log
test_4:
vsim -coverage -vopt -c +access +rw mc_tb +UVM_TESTNAME= "read_test2" +UVM_VERBOSITY=UVM_FULL -novopt -do run.do|tee $ ./logfiles/ "read_test2"_run.log
test_5:
vsim -coverage -vopt -c +access +rw mc_tb +UVM_TESTNAME= "slv_err_test" +UVM_VERBOSITY=UVM_FULL -novopt -do run.do|tee $ ./logfiles/ "slv_err_test"_run.log
test_6:
vsim -coverage -vopt -c +access +rw mc_tb +UVM_TESTNAME= "write_in_reserve_test" +UVM_VERBOSITY=UVM_FULL -novopt -do run.do|tee $ ./logfiles/ "write_in_reserve_test"_run.log
test_7:
vsim -coverage -vopt -c +access +rw mc_tb +UVM_TESTNAME= "write_test1" +UVM_VERBOSITY=UVM_FULL -novopt -do run.do|tee $ ./logfiles/ "write_test1"_run.log

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Design verification Engineer